Project specification
Project expertise
Description
- Development and implementation of complex FPGA designs on AMD/Xilinx devices
- Analysis and optimization of designs with regard to timing closure and performance
- Design, integration, and debugging of high-speed serial transceivers (e.g. GTH/GTY)
- Verification and validation of FPGA designs through simulation and hardware debugging
Requirements
- Several years of experience in FPGA development with AMD/Xilinx tools (e.g. Vivado)
- Strong expertise in timing optimization and timing closure strategies
- Solid experience with high-speed serial interfaces (e.g. PCIe, Ethernet, Aurora, or similar) Proficiency in VHDL and/or Verilog
- Practical experience with debugging and verification methods
- Understanding of performance-critical requirements and lithography constraints
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Frequently asked questions
The project is fully remote, providing complete location flexibility.
The project preferably starts in October 2026 and is planned to end in March 2027 (5 months).
The project is 100% remote. You can work from any location.
The project offers a daily rate of 88 - 120€ which breaks down to an hourly rate of 11 - 15€/h.
The project requires German (Advanced) as essential language. Additionally, English (Advanced) is desirable.
The project is related to the following industry: Information Technology.
The project covers the following business areas: Information Technology, Product Development, and Quality Assurance.
Yes! Recommend a freelancer for the project and earn 30% of FRATCH's profits every time they get placed — for the duration of that project. Simply share your invite link with a colleague to get started.
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