Alexandru (Ioan) Lotorosanu-Project Owner/PM and Software Architect

Product: VC-EVCC-P (Electric Vehicle Communication Controller for Pantograph Charging)

Key Responsibilities:

• Responsible for the full project life-cycle of the SAE J3105 Standby Mode (sequential charging) implementation on the Vector VC-EVCC-P, a DC Fast Charging communication controller used for electric bus pantograph charging. Covered both the project management and software architecture roles, working within an ASPICE-compliant process (SWE.1-SWE.6). Acted as the main point of contact between the end customer (Cummins/Sensata), the software supplier (Vector Informatik), and the development subcontractor (Piaxo). This included defining the project scope, reviewing technical and commercial proposals, negotiating deliverables, and tracking issues and change requests across multiple releases.
• Ran the project end-to-end using a structured work package approach — requirements, architecture, implementation, testing, release — while maintaining the project Gantt chart and keeping delivery on schedule.

On the architecture side, designed the two-mode Standby behaviour per SAE J3105-B:

• Mode 1: standby triggered before charging starts; the controller loops in a wait state until the charging station signals readiness, with the ready-to-charge timer paused in the meantime
• Mode 2: standby triggered during active charging; involves a controlled session teardown, keeping the wireless connection alive and starting a new session immediately without re-pairing — cutting reconnection time from 10–30 seconds to under 1 second
• Extended the V2G communication state machine (ISO 15118 / DIN 70121) with new standby sub-states
• Designed new CAN signals for the vehicle interface to communicate standby status and charging suspension requests
• Defined timeout handling for standby exit, with automatic session abort and fault code logging on expiry
• Updated the diagnostics layer: new fault code definitions, UDS service extensions, updated diagnostic description file

Before starting the architecture work, did a deep-dive analysis of the existing VC-EVCC-P reference implementation covering the V2G stack, CAN database, fault handling patterns, wireless communication layer, and both OppCharge and RMP charging sequences. Also reviewed the existing Cummins customer project to confirm the new feature would not break any existing modifications.

Wrote the full documentation chain:

• SRS: 26 system requirements, traced directly to SAE J3105-B

• SWRS: software requirements with full bidirectional traceability to the SRS

• SDD: state machine and sequence diagrams, component interaction details for both modes

• Supporting architecture analysis documents covering the V2G flow and standby integration

• Defined the testing approach: simulation enhancements in CANoe, test cases for all entry/exit scenarios in both modes, wireless retention validation, and timeout/error path coverage.

Technologies and Tools: SAE J3105-B, ISO 15118-2, DIN SPEC 70121, IEC 61851, AUTOSAR Classic (Vector MICROSAR, Flash Bootloader), SPC564B74L7 (PowerPC), CAN 2.0B, PLC / HomePlug Green PHY, CANoe 16 (Smart Charging), DaVinci Configurator / Developer, vFlash, vTESTstudio, VectorCAST, UDS (ISO 14229), PlantUML, STMicroelectronics MCAL

Key Responsibilities:

Responsible for developing, integrating, and validating low-level MCAL and BSW drivers for NXP automotive microcontroller platforms, working within an AUTOSAR Classic framework and in compliance with ISO 26262 functional safety requirements. Implemented and integrated a range of embedded drivers for safety-critical automotive ECUs, covering:

• Internal Flash (InFIs): driver development for on-chip flash read/write/erase operations, including sector management and error handling
• EEPROM emulation (EEP): implementation of EEPROM-over-flash driver for non-volatile data storage with wear leveling support
• External Flash (ExFIs): SPI/QSPI-based external flash driver for extended program/data storage on automotive ECUs
• Resource domain allocation and memory protection: configuring secure access to peripherals and managing chip resources across multiple safety domains
• PSIS (Peripheral Sensor Interface 5): driver for automotive sensor communication, supporting high-speed and fault-tolerant data transfer
• MRAM (Magnetic RAM): driver for non-volatile memory operations with fast read/write cycles suited to automotive environments
• Secure Boot flow — involved in the integration and configuration of authenticated firmware loading mechanisms, ensuring integrity-verified startup sequences on NXP-based ECUs

Worked across a broad range of NXP automotive platform families:

• S32K1xx / S32K3xx — microcontrollers for body, powertrain, and safety applications
• S32G2 / S32G3 — gateway processors for vehicle networking and service-oriented architecture
• S32R — radar processors for ADAS and safety sensing applications
• S32Z / S32E — real-time processors for zonal and domain controller architectures
• S32N — network processors for high-bandwidth in-vehicle ethernet and multi-domain communication

Covered the full software development lifecycle for each driver module — from requirements definition and architecture/design through implementation, unit testing, and integration validation. Updated requirements and design documentation to reflect scope changes and defect resolutions.

Provided technical support to external customers integrating NXP MCAL drivers into their own platforms — analysing reported issues, reproducing bugs, delivering root cause analysis, and supplying fixes or workarounds.

Performed debugging and low-level analysis using Lauterbach trace tools, working with S32 Design Studio and Tresos (Elektrobit) for AUTOSAR-compliant driver configuration and code generation.

Worked in an Agile/Scrum environment contributing to sprint planning and delivery, with full traceability maintained in Jira/Confluence.

Technologies and Tools: AUTOSAR Classic, ISO 26262, NXP S32 Design Studio, Tresos (Elektrobit), Lauterbach, Git, Sourcetree, Jira/Confluence, Agile/Scrum

Activities:

• Developed two Java-based tools (frontend and backend) to automate XML configuration and streamline issue management, improving efficiency for the integration team:
• First tool was created in order to configure automatically xml files based on xdm (schema) files.
• The second one was created for integration team in order to be used for issues management.
• Embedded software developer for BSW Traveo II platform having the following activities:
• Integrate and validate AUTOSAR modules on uC Traveo II platform.
• Developed and validated complex device drivers (CDD) within the I/O Hardware Abstraction layer using C, leveraging automated tests (functional, module, and unit tests) for enhanced system reliability.
• Review code and design.
• Interface with hardware design and development.
• Analyze and enhance efficiency, stability and scalability of system resources.
• Create design document and user manual for drivers.
• Create functional and non-functional requirements, design and integration requirements.
• Work in an Agile cross-functional team.
• Mentoring new comers.
• Coordinating students.
• Provide post production support.
• I2C and SPI protocols experience.

Example of developed and validated drivers:

• Outputs diagnosis using external devices.
• Outputs control for direct, demultiplexed and pwm signals.
• Input acquisition and debouncing for direct and multiplexed signals (digital and analogic).
• DMA (Direct Memory Access) driver.
• UART driver.
• SPI driver used only for reception of data using DMA (Direct Memory Access).

Technologies used:

• Jira/Confluence experience
• Git experience
• Agile - Scrum Master experience
• AUTOSAR
• Tresos Elektrobit
• Jenkins
• C Embedded
• Python (Test/Build Scripting)
• IMS/MKS
• CAN Case
• WinIDEA
• Lauterbach