Pooria Varahram-Chief Technology Architect
Check rate
Experience
Chief Technology Architect
Benetel
- Drive Technology Strategy
- Lead System Architecture
- Lead Research Funding Initiatives
Research and Development Principal Engineer
Benetel
- Architecting overall system solutions to demonstrate system level functionality of roadmap features
- Leading research activities in support of Benetel’s product roadmap
- Leading the incorporation of roadmap features in active product development programs
- Leading Benetel IP capture and management
Senior System Engineer
Qorvo
- Researching UWB communications systems algorithms
- Developing system simulations and baseband architectures
Principal Engineer
Benetel
- Designing and developing DSP modules such as DUC/DDC and PRACH in 5G RRUs
- Developing ModelSim testbenches and verifying them using MATLAB/Octave simulation
- Leading the 5G architecture development of ORAN compliant RRU
- Leading the FPGA team in designing and developing the lower L1 of 5G
- Actively participating in the design and development of CUSM-Planes
- Creating firmware development plans and reporting progress to project managers
- Providing test vectors for conducting RRU verification based on 3GPP standard
Senior FPGA Engineer
Benetel
- Designing and developing 4G and 5G NR ORAN-compliant RRUs
- Developing FPGA code in SystemVerilog and Verilog
- Designing digital up-conversion and down-conversion modules on FPGA
- Developing self-checking testbenches for downlink and uplink paths
- Designing and developing the PRACH module in the RRU
- Leading the first RRU project with split 7.2 using an ARM processor, showcased in exhibitions like MWC and receiving awards
- Developing a U-Plane path from ARM to FPGA using DMA and FIFO
- Actively participating in ORAN meetings and gaining extensive knowledge on fronthaul and CUSM planes
- Providing consultation on various 5G technology projects to multiple companies
- Conducting several internal presentations to Benetel staff on topics such as digital predistortion, crest factor reduction, and OFDM systems
- Project planning and documentation
Radio Digital Developer
Ericsson
- Performing calibration of a 1 GHz bandwidth signal for the 5G testbench, encompassing RF DAC, RF ADC, and wideband PA
- Designing and verifying a novel DPD technique to linearize the wideband PA
- Offering consultation to the CFR team at Ericsson
Research Fellow
Maynooth University
- Developing algorithms for digital communication systems
- Providing consultation to two US companies for their product development in DPD and satellite projects
- Implementing a digital pre-distortion technique on Zynq with an ARM processor in FPGA
- Demonstrating the pre-distortion functionality running on FPGA using a transceiver board from Analog Devices
- Conducting RTL development and synthesis
- Analyzing the static timing analysis report and rectifying critical paths in the design by applying pipeline delays
- Performing hardware co-simulation verification by transferring data from a PC while the FPGA and power amplifier were in the loop
- Creating code to linearize a TWTA power amplifier
Senior Lecturer
University Putra Malaysia
- Supervising undergraduate, MSc, and PhD students
- Providing consultation for research projects and theses
- Teaching communication systems modules
- Actively involved in commercializing filed IPs and developing an IP in Verilog
- Publishing high-impact journal papers
Senior Lecturer
Asia Pacific University of Information Technology
- Taught telecommunication modules
- Established the wireless lab and participated in the accreditation program
Researcher
University Putra Malaysia
- Submitted research proposals
- Involved in commercialization of IPs
Electrical Engineer
AGNI Inc.
- Headed the electronic group
- Designed DC-DC and DC-AC converters
- Developed C code to control a butterfly valve using an Atmel microcontroller
- Designed an H-bridge
- Created schematics and fabricated PCBs
Digital Communication Engineer
Resana Afzar Sharif
- Designed and developed a digital pre-distortion for a 2.4 GHz power amplifier
- Involved in test and measurement of a TV transmitter with PLL
Electronic Engineer
Micromodje Industry
- Designed and developed a radio digital and prepared BOM
- Fabricated PCBs and drew schematics
Industry experience
See where this freelancer has spent most of their professional time.
Experienced in Telecommunication, Education, Manufacturing, Aerospace and Defense, and Information Technology.
Business area experience
See which departments and functions this freelancer has contributed to most.
Experienced in Product Development, Research and Development, Quality Assurance, Project Management, Production, and Strategy.
Summary
I specialize in digital signal processing and FPGA programming for wireless communication systems, with extensive experience in designing and developing remote radio units (RRUs). I am highly proficient in Verilog, SystemVerilog, and C, and skilled in using industry-standard tools such as Quartus, Vivado, Vivado HLS, MATLAB, Python, Protel, and Microwave Office. I have led the design and architecture of 4G and 5G ORAN-compliant RRUs and have contributed to the field through several peer-reviewed publications and patent filings.
Skills
- Quartus
- Vivado
- Vivado Hls
- Matlab
- Orcad
- Protel
- Ads
- Vhdl/Verilog
- Systemverilog
- Python
- Labview
- C
- Assembly
- Systemvue
- Microwave Office
- Microsoft Office
- Fpga Developer
- Dsp Developer
- Rf Front-End Designer
- Analogue Communication Engineer
- Digital Design Developer
Languages
Education
University Putra Malaysia (UPM)
Ph.D · Seri Kembangan, Malaysia
TarbiatModares University
MSc · Tehran, Iran, Islamic Republic of
Khajeh Nasir Toosi
B. Eng · Tehran, Iran, Islamic Republic of
Certifications & licenses
Arm Accredited Engineer (AAE) Training
ARM
Statistics
Experience
Expertise
Qualifications
Profile
Frequently asked questions
Have questions? Find more information here.
Pooria is based in Maynooth, Ireland.
Pooria speaks the following languages: English (Advanced), Irish (Advanced).
Pooria has at least 20 years of experience. During this time, Pooria has worked in at least 12 different roles and for 9 different companies. The average length of individual experience is 2 years and 6 months. Note that Pooria may not have shared all experience and actually has more experience.
Based on recent experience, Pooria would be well-suited for roles such as: Chief Technology Architect, Research and Development Principal Engineer, Senior System Engineer.
Pooria's most recent position is Chief Technology Architect at Benetel.
In recent years, Pooria has worked for Benetel and Qorvo.
Pooria is most experienced in industries like Telecommunication, Education, and Manufacturing. Pooria also has some experience in Aerospace and Defense and Information Technology.
Pooria is most experienced in business areas like Product Development, Research and Development, and Quality Assurance. Pooria also has some experience in Project Management, Production, and Strategy.
Pooria has recently worked in industries like Telecommunication.
Pooria has recently worked in business areas like Product Development, Research and Development, and Strategy.
Pooria holds a Doctorate from University Putra Malaysia (UPM), a Master from TarbiatModares University and a Bachelor from Khajeh Nasir Toosi.
Pooria has 1 certificate: Arm Accredited Engineer (AAE) Training.
The availability of Pooria needs to be confirmed.
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Calculated based on our freelancers’ daily rates as of 26 Aug 2026. Actual rates may vary depending on seniority level, experience, skill specialization, project complexity, and engagement length.
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